whoami (PhD @UF -> Research Scientist @GeorgiaTech)

I am a PhD alum (advised by Dr. Thomas Shrimpton) of FICS Research, University of Florida (USA). I hold an MS in Computer Science from University of Florida, and a BTech in Computer Science from NIT Rourkela (India). After my BTech, I worked as an engineer for Samsung Research Institute, Noida for two years followed by a two year teaching stint at KIIT, Bhubaneswar (my hometown). At Samsung, my work involved understanding the working of various FM drivers (e.g., Marvell, CSR) and solving bugs along with working on code optimization and stabilization. At KIIT, I taught undergraduate students Programming in C, Computer Security.

My research lies at the intersection of Cryptography and Hardware Security. In particular, I am interested in analysing security problems such as intellectual-property theft and counterfeiting, in the integrated-circuit supply chain using principles of modern cryptography. My reseaech has been published at top-tier security conferences (ACM CCS, IEEE S&P), has resulted in 7 CVEs, and has also been featured in The Register, threatpost, The Hacker News, and other cybersecurity news publications.

Life outside work and research: I love sports (tennis, table tennis/ping pong and cricket), write poems and songs occasionally, and like cooking (of course, eating too).

More about my research

The modern multi-billion-dollar integrated-circuit supply chain is global and distributed as different entities come together to produce a packaged integrated circuit. Developers of these integrated circuits or IP authors as they are otherwise known, spend lots of time, money and effort to come up with an efficient design of an integrated circuit. Therefore, IC designs are considered as intellectual properties of IP authors, and security mechanisms are needed to prevent adversarial entities in the supply chain from stealing the circuit IPs. In my research, I use principles of modern cryptography to develop provably-secure defenses against IP theft.

In my CCS’17 paper “Standardizing Bad Cryptographic Practice - A teardown of the IEEE P1735 standard for protecting electronic-design intellectual property”, my co-authors (Adib Nahiyan, Dr. Domenic Forte, Dr. Thomas Shrimpton) and I found weaknesses in the IEEE P1735 standard that leads to efficient recovery of plaintext circuit-design IP by exploiting error messages that electronic-design and automation tools output during synthesis of encrypted circuit-design IPs. This work resulted in 7 Common Vulnerabilities and Exposures (CVE) entries in the Vulnerability Notes Database and was featured in The Register, threatpost, The Hacker News, and other cybersecurity news publications. Note that the IEEE P1735 standard was aimed at protecting the circuit-design IP of IP authors from other adversarial IP authors in the design phase.

In my IEEE S&P’22 paper “Hardening Circuit Design IP Against Reverse-Engineering Attacks”, my co-author (Dr. Thomas Shrimpton) and I gave provable-security foundations for design-hiding (DH) schemes that are used by IP authors to protect their circuit-design IPs from adversarial foundries. We gave the first DH scheme that provably hides combinational/stateless circuits against honest-but-curious adversaries that try to reverse-engineer the full functionality of the hidden circuit.

Research (Lead)

• IEEE S&P’22: Hardening Circuit Design IP Against Reverse-Engineering Attacks [Paper]
• CCS’17: Standardizing Bad Cryptographic Practice - A teardown of the IEEE P1735 standard for protecting electronic-design intellectual property [Paper]

Research (Support)

• CODASPY’21: Brittle Features of Device Authentication (Second author) [Paper]